TKT-1202 Digitaalisuunnittelu Digital Design Fall 2007

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1 TKT-1202 Digitaalisuunnittelu Digital Design Fall Tampere University of Technology Institute of Digital and Computer Systems

2 TKT-1202 Lectures Lecturer Prof. Timo D. Hämäläinen Room TG407 Research activities: 2

3 Lecture Schedule 2007 Date Time Place Topic wed TB104 Course info, Overview of digital design (Chapt. 1,3) tue TB109 Combinatorial Systems Specification, description and analysis (Chapt. 2,4) wed TB104 Combinatorial Systems Design (Chapt.. 5,6) tue TB109 Sequential Systems Specification (Chapt. 7) wed TB104 Sequential Systems Design (Chapt. 8) tue TB109 State Machine Design (Extra material) wed TB104 Sequential Systems Modules (Chapt. 11) wed TB104 Combinatorial Systems Modules (Chapt. 9) wed TB104 Arithmetic Modules (Chapt. 10) wed No lectures wed TB104 Register Transfer Level, Data and control subsystems (Chapt. 13,14) wed K1702 Programmable logic (Chapt. 5.7, 12) wed TB104 Review 3

4 TKT-1202 Exercise Staff 2007 Regular exercises Erno Salminen Ari Kulmala Computer exercises Riku Uusikartano Always start the Subject field with [TKT-1202] All exercise information on course web pages 4

5 TKT-1202 Passing the Course Exam Compulsory exercises 1. Hear it forget? 2. Write it remember! 3. Do it understand!! compulsory excercises Exercises give practical experience Lectures gives theoretical background Exam measures student s ability to specify, design, implement and analyze digital systems 5

6 Passing the Exercises 6 regular and 5 computer exercises each ~4 tasks 50% of both must be accepted 12 regular tasks 10 computer tasks Bonus for more than 50% of tasks solved (both together) Exercises must be accepted before exam Tasks Bonus <22 failed

7 Exam dates and times Remember to check the latest information on TUT web pages TKT-1220 Exam Date Time : : :00 7

8 TKT-1202 Motivation Why to take this course? Learn how digital devices function and how to design those by yourself! Where do you need these skills? Computer engineering Embedded/HW oriented programming Mission critical and real-time systems design 8

9 TKT-1202 Prerequisites You should know the basics of digital electronics Recommended TKT-1100 Digitaalitekniikan perusteet Basic building blocks Gates as components and logical elements Gate networks Flip-Flop: logical operation and timing Handling of logic expressions Logic (switching) expressions Boolean algebra Karnaugh map: minimization of expressions 9

10 Course materials Textbook M.D. Ercegovac, T. Lang, J.H. Moreno, Introduction to Digital Systems, John Wiley and Sons, 1999, ISBN All chapters, no VHDL related sections WARNING: DO NOT SEE ANY OF THE VHDL EXAMPLES OF THE TEXTBOOK not suitable for real working digital system designs! 10

11 Course materials Lecture notes Additional information Shows focus areas and topics of textbook sections Exercise support material Tutorials to EDA tools 11

12 Institute of Digital and Computer Systems

13 Institute of Digital and Computer Systems 4 Professors, 1 Docent ~100 PhD & MSc students working in research projects Some research topics Wireless Sensor Networks MPEG-4/H.264 Video encoders Novel processor designs System-on-Chip interconnection networks Design tools and methodologies Prototypes and implementations of complete systems including digital electronics, embedded SW, operating systems, data bases, Java/Web 13

14 DSP-based Multiprocessor System TUTNC (1996) FPGA SRAM Interface to host PC DSP-processor 14

15 DSP-based Multiprocessor System PARNEU (1998) Interface to host PC FPGA DSP-processor 15

16 Example: QoS & Secure WLAN & terminal (2000) FPGA SRAM DSP-processor 16

17 Multi Radio WSN Platform 2005 Soft-core processor on programmable logic chip 1-4 parallel radio links Tested with stereo CD quality audio (SPDIF in/out) Extremely low endto-end delay 17

18 Examples of TUTWSN Wireless Sensor Nodes Copyright Tampere University of Technology 18

19 Kuinka TKT-1202 sijoittuu tutkintoon? 20

20 Ajallisesti Perusopinnot Vuosi 1-2 Esitiedot Vuosi 1 per. 1 per. 2 per. 3 per. 4 per. 5 labra DIGIPK (3 op) MPROS (5 op) (3 op) Kandidaatti, 25 op. Aineopinnot A/B, 25op Vuosi 2 Vuosi 3 per. 1 per. 2 per. 3 per. 4 per. 5 per. 1 per. 2 per. 3 per. 4 per. 5 DS (5 op) DJT (8 op) TKT I(5 op) ARITM I (4 op) 21 Digitaali- ja tietokonetekniikan kandiprojekti (8op)

21 22 Koulutusohjelmittain: TITE Kandidaatin tutkinnon rakenne Kuinka suoritan kandidaatin tutkinnon digitaali- ja tietokonetekniikan laitoksella kun: a) Olen tietotekniikan opiskelija Op. Kandidaatin perusopinnot Tietotekniikan perusopinnot 110 Aineopinnot A Digitaali- ja tietokonetekniikan aineopinnot 25 Kandidaatintyö A:sta Digitaali- ja tietokonetekniikan kandidaatintyö 8 Aineopinnot B Esim. ohjelmistotekniikan aineopinnot 25 Vapaasti valittavat Koulutusohjelman mukaiset vapaasti valittavat 12 Kandidaatin tutkinto Digitaali- ja tietokonetekniikan kandidaatti 180 Esimerkki Perusopinnot Ohjelmistopainotteinen kandidaatti Tietotekniikan perusopinnot FYS-1010 Fysiikan työt I 3 FYS-1090 Insinöörifysiikka I 6 FYS-1110 Insinöörifysiikka IIa 6 FYS-1120 Insinöörifysiikka IIb 2 IHTE-1100 Käytettävyyden perusteet 3 KEM-1100 Insinöörikemia 3 KIE-2200 Ruotsia tekniikan opiskelijoille 3 MAT Insinöörimatematiikka A 1 3 MAT Insinöörimatematiikka A 2 4 MAT Insinöörimatematiikka A 3 3 MAT Insinöörimatematiikka A 4 4 MAT Insinöörimatematiikka A 5 4 MAT Todennäköisyyslaskenta 3 MAT Diskreetti matematiikka 3 MAT Algoritmimatematiikka 3 OHJ-1010 Tietotekniikan perusteet 4 OHJ-1101 Ohjelmointi I e 4 OHJ-1151 Ohjelmointi II e 5 OHJ-1200 Johdatus yliopisto-opintoihin 1 OHJ-2100 Ohjelmistotieteen perustyökaluja 5 OHJ-3010 Ohjelmistotuotannon perusteet 4 SGN-1200 Signaalinkäsittelyn menetelmät 4 SGN-1250 Signaalinkäsittelyn sovellukset 4 TETA-1010 Teollisuustalouden perusteet 4 TKT-1100 Digitaalitekniikan perusteet 3 TKT-1110 Mikroprosessorit 5 TLT-2100 Tietoliikenneverkkojen perusteet 5 TLT-3100 Tietoturvallisuuden perusteet 3 Vieraan kielen opintoja (vähintään perustaso) 3 Opiskelijan on valittava vieraan kielen opintoja (jatkotaso) 3 Yhteensä 110

22 Koulutusohjelmittain: TITE Kandidaatin tutkinnon rakenne (jatkoa) Kuinka suoritan kandidaatin tutkinnon digitaali- ja tietokonetekniikan laitoksella kun: b) Olen tietotekniikan opiskelija Op. Ohjelmistopainotteinen kandidaatti Esimerkki (jatkoa) Perusopinnot (ks. ed sivu) Suositeltavat valinnaiset Aineopinnot A Tietotekniikan perusopinnot Yhteensä 110 Suositeltavat valinnaiset MAT Diskreetti matematiikka 3 SGN-1200 Signaalinkäsittelyn menetelmät 4 TLT-2100 Tietoliikenneverkkojen perusteet 5 Yhteensä 12 Aineopinnot A TKT-1202 Digitaalisuunnittelu 5 TKT-1212 Digitaalijärjestelmien toteutus 8 TKT-1220 Tietokonearitmetiikka I 4 TKT-3200 Tietokonetekniikka I 5 TKT-1230 Digitaalitekniikan laboratoriotyöt 3 Yhteensä 25 Aineopinnot B Kandidaatintyö Aineopinnot B OHJ-1150 Ohjelmointi II 5 OHJ-1400 Olio-ohjelmoinnin peruskurssi 4 OHJ-2010 Tietorakenteiden käyttö 5 OHJ-3300 Johdatus tietokantoihin 3 OHJ-4010 Rinnakkaisuus 4 OHJ-4200 Laitteistonläheinen ohjelmointi 4 Yhteensä 25 Kandidaatintyö Digitaali- ja tietokonetekniikan kandidaatintyö 8 23 Kandidaatin tutkinto Kandidaatin tutkinto 180

23 24 Koulutusohjelmittain: Sähkö Kuinka suoritan kandidaatin tutkinnon digitaali- ja tietokonetekniikan laitoksella kun: b) Olen sähkötekniikan opiskelija Op. Kandidaatin perusopinnot Sähkötekniikan perusopinnot 110 Aineopinnot A Digitaali- ja tietokonetekniikan aineopinnot 25 Kandidaatintyö A:sta Digitaali- ja tietokonetekniikan kandidaatintyö 8 Aineopinnot B Esim. Elektroniikan aineopinnot 25 Vapaasti valittavat Koulutusohjelman mukaiset vapaasti valittavat 12 Kandidaatin tutkinto Digitaali- ja tietokonetekniikan kandidaatti 180 Esimerkki Perusopinnot Laitteistopainotteinen kandidaatti Sähkötekniikan perusopinnot ELE-1010 Elektroniikan perusteet I 3 ELE-1020 Elektroniikan perusteet II 6 FYS-1010 Fysiikan työt I 3 FYS-1150 Fysiikka S I 5 FYS-1160 Fysiikka S II 5 KEM-1100 Insinöörikemia 3 KIE-2200 Ruotsia tekniikan opiskelijoille 3 LTT-1100 Johdatus lääketieteelliseen tekniikkaan 3 MAT Insinöörimatematiikka B 1 3 MAT Insinöörimatematiikka B 2 4 MAT Insinöörimatematiikka B 3 3 MAT Insinöörimatematiikka B 4 4 MAT Insinöörimatematiikka B 5 4 MAT Vektorianalyysi 3 MAT Fourier'n menetelmät 3 MAT Todennäköisyyslaskenta 3 OHJ-1010 Tietotekniikan perusteet 4 OHJ-1100 Ohjelmointi I 4 SMG-1100 Piirianalyysi I 5 SMG-1200 Piirianalyysi II 5 SMG-1300 Sähkömagneettiset kentät ja aallot I 5 SMG-1400 Sähkömagneettiset kentät ja aallot II 5 SVT-1100 Sähköenergia 6 TEL-1010 Tehoelektroniikan perusteet 4 TETA-1010 Teollisuustalouden perusteet 4 Opiskelijan on valittava vieraan kielen opintoja (vähintään perustaso) 3 Opiskelijan on valittava vieraan kielen opintoja (jatkotaso) 3 Yhteensä 106

24 Koulutusohjelmittain: Sähkö Kandidaatin tutkinnon rakenne (jatkoa) Kuinka suoritan kandidaatin tutkinnon digitaali- ja tietokonetekniikan laitoksella kun: b) Olen sähkötekniikan opiskelija Op. Esimerkki Laitteistopainotteinen kandidaatti (jatkoa) Perusopinnot (ks. ed sivu) Suositeltavat valinnaiset Aineopinnot A Sähkötekniikan perusopinnot Yhteensä 106 Suositeltavat valinnaiset TKT-1110 Mikroprosessorit 5 TLT-5100 Tiedonsiirtotekniikan perusteet 5 OHJ-1150 Ohjelmointi II 5 SMG-1000 Johdatus yliopisto-opintoihin 1 Yhteensä 16 Aineopinnot A TKT-1202 Digitaalisuunnittelu 5 TKT-1212 Digitaalijärjestelmien toteutus 8 TKT-1220 Tietokonearitmetiikka I 4 TKT-3200 Tietokonetekniikka I 5 TKT-1230 Digitaalitekniikan laboratoriotyöt 3 Yhteensä 25 Aineopinnot B Kandidaatintyö Aineopinnot B ELE-2050 Elektroniikan työkurssi 6 ELE-2100 Puolijohdekomponenttien sovellukset 4 ELE-2150 Integroitujen piirien perusteet 4 ELE-2200 Analogiatekniikka I 4 ELE-2250 Johdatus suurtaajuustekniikkaan 4 ELE-2300 Sulautettujen prosessorisovellusten perusteet 3 Yhteensä 25 Kandidaatintyö Digitaali- ja tietokonetekniikan kandidaatintyö 8 25 Kandidaatin tutkinto Kandidaatin tutkinto 180

25 26

26 Introduction to Digital Design

27 Outline Overview Design views Functionality, Architecture, Implementation Abstraction levels and Hierarchy Digital design flow & automation Specification, Design Capture, Implementation, Analysis Understanding the concept of time 28

28 Overview of Digital Design Flow z(t)=f(x(t)) 10Mbit/s 0.3mm Specification Analysis Design Implementation 29

29 Digital Design Views Architecture Structure Behaviour Functionality What are the logical building blocks? How are they organized? What should be done? What is the behaviour? What are the physical components? What kind they are? 30 Implementation Physical

30 Characteristics (example) Architecture Number of AND-gates Clock cycles Functionality z = x+y s(t+1) = r(t-1)+p(t) Clock speed Delay Power consumption Size, Color 31 Implementation

31 Digital Design Means Several Designs Independent of implementation Independent of application General theories Application dependent Design of Functionality - What? Implementation dependent Design of Architecture - How? Implementation (Mapping) 32

32 What is Mapping? Realize desired functionality on available architecture Direct mapping, one-to-one Architecture is designed to realize the functionality Each functional operation has corresponding realization in architecture Architecture can not realize any other functionality Example: digital wall clock (Note: usually the term mapping is not used, just design ) Indirect mapping Architecture can realize also other functionalities There is no exactly corresponding physical component for each functional operation Shared, re-used in respect of time Ultimate example: processor 33

33 Example: Custom VLSI Chip Implementation Functionality: z ( ab) c Architecture: a b c z Implementation: Library of basic components (all gate types available) Functionality is the same as the architecture Direct mapping, the smallest unit is gate (transistor) Implementation = connecting building blocks together! 34

34 Example: Discrete Logic Chip Implementation Functionality: z ( ab) c Architecture: Implementation: c b a The smallest unit is chip Direct mapping, but how to select the best mapping? z 35

35 Example: FPGA Implementation Functionality: z ( ab) c Architecture: a1 a2 a3 a4 a1 a2 a3 a4 LUT LUT b1 b2 b1 b Programmable interconnect a1 a2 a3 a4 a1 a2 a3 a4 LUT LUT b1 b2 b1 b Programmable interconnect a1 a2 a3 a4 a1 a2 a3 a4 LUT LUT b1 b2 b1 b Implementation: a1 a2 a3 a4 a1 a2 a3 a4 LUT LUT b1 b2 b1 b Programmable interconnect a1 a2 a3 a4 a1 a2 a3 a4 LUT LUT b1 b2 b1 b Programmable interconnect a1 a2 a3 a4 a1 a2 a3 a4 LUT LUT b1 b2 b1 b Indirect mapping, the smallest unit is Look-up Table (can perform all basic logic functions) 36

36 Notes About Examples Digital design allows several ways to implement given functionality Trade-offs between physical properties like cost, area, speed, also source of problems! Example: six-digit adder, two architectures X 5 X 4 X 3 X 2 X 1 X 0 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0 X 5 X 4 X 3 X 2 X 1 X 0 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0 6-Digit Adder One-Digit Adder (carry storage inside) Z 5 Z 4 Z 3 Z 2 Z 1 Z 0 Digits in parallel Z 5 Z 4 Z 3 Z 2 Z 1 Z 0 Digits in serial 37

37 Design Views - Problems SW engineer Designs only functionality Experience needed to fulfil e.g. performance requirements Can not affect architecture Electronics engineer Designs architecture Functionality = Architecture Can not understand separation of the two 38

38 Design Views - Problems Basic Digital Design Course Student Exercises must be simple Design often means only architecture design How is related to specification and design? Functionality a Architecture z ( ab) c = b c z Specification (functional specification) Design - often still same as functional specification in a graphical notation! 39

39 Abstraction Levels and Hierarchy in Digital Design

40 Abstraction Levels Architecture Processors, memories Registers Gates Transistors Functionality Algorithms Register transfer Boolean expressions Diff. equations Transistor layout Cells Chips Boards 41 Implementation

41 Abstraction Levels in Design Flow High abstraction level Suitable to coarse planning what is desired Typically in the beginning of the design flow The lower level, the more detailed information and the more effort required if something is changed at higher level Abstraction levels and design hierarchy can be considered at the same time 42

42 Hierarchy in Digital Design Large designs must be partitioned into blocks to be manageable Compare: SW functions Nobody writes only main function? Example: Zt ( )= P t i=0 Xi () Clock clk Registers Adder Input Module level X(i) xin RX xreg Output addout ADD z RY yreg Physical (transistor) level Z (a) +5V Clock Logical (gate and flip-flop) level Flip-Flop Gates (b) 43 (c) Transistor

43 Hierarchy level Order of design Design Flow & Hierarchy Top-down design Bottom-up design System 1. Top level N. Modules 2. Gates and flip-flops 2. Transistors A B C D Bottom level N. B 1. A C D 44

44 Design Flow & Design Automation

45 Overview of Digital Design Flow z(t)=f(x(t)) 10Mbit/s 0.3mm Specification Analysis Design Implementation 46

46 Specification Most course examples: same specification for both functionality and architecture (one-toone mapping) Two basic approaches Informal, can not be handled automatically Formal, can be analysed (mathematical, logical) executed (simulations, used in functional verification ) Textual, graphical or tabular format 47

47 Design (Manual) Design Transform specification into binary world if not yet Functionality in truth tables, state transition tables, state diagrams, Optimization of logic functions Use basic building blocks: gates, FF, Design network(s) of logic elements Results in implementation 48

48 Analysis Reverse-engineer: try to obtain specification from an implementation Course textbook approach! Verify that implementation works as specified Functional Physical 49

49 EDA Electronic Design Automation 1. Specification If formal, might be used directly in design capture If informal, guides the design capture 2. Design capture Textual: HW design languages Graphical: Schematic capture, resembles manual drawings of e.g. gate networks 3. Functional verification Most often simulation 50

50 EDA Electronic Design Automation 4. Synthesis Minimization of logic Place and Route HW assembly of building blocks Uses libraries (elementary building blocks) Gives feedback about preformance, area, 5. Verification Simulation results with back-annotated performance values Testing in a real prototype (e.g. FPGA board) 51

51 Libraries in Digital Design Architectures are made of building blocks (components) Components obtained from libraries Transistors Gates Flip-flops Multiplexers, counters Adders, multipliers Physical components Pre-designed VLSI lay-out cells Configurable logic units (FPGAs) IC-chips (past discrete components) 52

52 Understanding Time in Digital Design

53 Time in SW and Digital Design Time in SW design Time can not be expressed explicitly like: z=ab+c executes in 10ms Only way is to use timers, interrupts, priorities and experience Execution of program code is best-effort Time resolution is k clock cycles Time in digital design Essential part of specification Expressed explicitly Digital logic timing is fully deterministic Time resolution is 1 clock cycle 54

54 Example: Write Characters to a LCD Display Data & ctrl signals LCD Display Microcontroller (Self-made board computer for a car 1996) 55

55 LCD Display Data Sheet 56

56 LCD Display Data Sheet: Write Timing 57

57 58 Timing in SW Trial-and-error: find timing of instruction execution Depends on processor clock speed Very dangerous if processor is changed and code re-used (compare: old games) Use timers Interrupt or poll timer Not possible to give timing explicitly in code /* write a display data word to LCD */ void lcd_data(unsigned char lcddata) { PORTC = 0x02; /* write word to LCD xxxx xx1x */ sdelay(3); PORTC = 0x04; /* LCD Enable: xxxx x1xx */ PORTB = lcddata; /* data word to be written */ sdelay(60); PORTC &= 0xfb; /* LCD E: xxxx x0xx falling edge */ sdelay(100); }

58 Timing in Digital System Design Specification includes time Phases of computation and their duration is realized with state machine All operations are referenced to a clock STATE B Input signals STATE A STATE C Output signals STATE D State Machine 59 Clock

59 Synchronous time Value Asynchronous system Value Synchronous system Time Time Continuous time is discretized with Clock Ideally clock is a zero unit instant, a tick In practice, clock edge is considered (rising, falling) 60

60 Benefits of Synchronous Systems Signals change only at discrete instants Much easier to design, debug and analyse Easier to interface separate blocks x(t) x(t) z(t) Clock time z(t) time When output changes? 61